A conventional circuit for processing digital video signals has been described on pages 48, 50 and 51 of "The Television Technology, February of 1987." The conventional circuit for processing digital video signals comprises a random access memory (RAM) into which luminance signals Y, color difference signals R-Y and B-Y are written and from which these signals are read, and serial to parallel (S/P) converters or demultiplexers and parallel to serial (P/S) converters or multiplexers for making a sampling frequency of the luminance signal Y in alignment with those of the color difference signals R-Y and B-Y.
In operation, a luminance signal Y of 8 bits is supplied from an NTSC decoder to the S/P converter in which the luminance signal is converted to be of 32 bits, and the luminance signal is written into the RAM by data of each four clocks simultaneously with color difference signals R-Y and B-Y of 8 bits supplied from the NTSC decoder. These signals written into the RAM are read therefrom to provide a luminance signal of 32 bits and color difference signals R-Y and B-Y of 8 bits. The luminance signal of 32 bits is converted in the P/S converter to a signal of 8 bits which is supplied to an NTSC together with the color difference signals R-Y and B-Y. Thus, the delay of video signals and the correction of time base can be carried out by using a memory.
However, the conventional circuit for processing digital video signals has a disadvantage in that the RAM must be provided with input and output pins as many as 48 input pins and 48 output pins to process the signals of the aforementioned bit number, where a semiconductor memory is used for the RAM. Therefore, the fabricating cost for the semiconductor memory is high.